Memory devices are typically provided as internal, semiconductor, integrated circuits in computers or other electronic devices. There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and flash memory.
Flash memory devices have developed into a popular source of non-volatile memory for a wide range of electronic applications. Flash memory devices typically use a one-transistor memory cell that allows for high memory densities, high reliability, and low power consumption. Common uses for flash memory include personal computers, personal digital assistants (PDAs), digital cameras, and cellular telephones. Program code and system data such as a basic input/output system (BIOS) are typically stored in flash memory devices for use in personal computer systems.
Flash memory devices may be manufactured in a NOR architecture or a NAND architecture. In a NOR configuration, the cells are arranged in a matrix. The gates of each floating gate memory cell of the array matrix are connected by rows to wordlines and their drains are connected to column bitlines. The source of each floating gate memory cell is typically connected to a common source line.
A NAND flash is comprised of an array of floating gate cells arranged in series chains. Each of the floating gate cells are coupled drain to source in each series chain. A word line that spans across multiple series chains is coupled to the control gates of each floating gate cell in a row in order to control their operation. The bitlines are eventually coupled to sense amplifiers that detect the state of each cell.
In order to increase the memory density of flash memory devices, manufacturers are stacking memory dies so that each device may be comprised of multiple dies. In such a device, the dies typically use a common chip enable line and an address line is used to select between the dies. This stacking scheme treats two or more memory devices as if they were one memory space.
A problem exists when a command is used that does not require an address (e.g., read status). When such a command is transmitted to the memory devices without differentiating which device is being addressed, all of the devices will transmit back substantially simultaneously on the same bus.
One way to get around this problem is to redefine the commands that do not have addresses to include an address associated with the command. However, this is difficult to implement since, once the die is preprogrammed, it must be marked as having a particular address. When a memory device is manufactured from multiple dies, the dies must be correctly assembled in an integrated circuit so that no two dies with the same address end up in the same memory device. Such an assembly process requires detailed labeling and tracking of the differently programmed dies. This creates a logistical problem for manufacturers.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for a flash memory device that has multiple memory dies that can be individually addressed with all memory commands.